EENG 2910 - Project III: Digital System Design

2 hours

Digital system design projects that provide students substantial experience in logic analysis, design, logic synthesis in VHDL, and testing. Project documentation including all the phases of project cycle from requirement analysis to testing as well as a project presentation providing the students an opportunity to enhance their communication and presentation skills, are essential components of this course. Instructor may choose to include a mini-project for breadboard implementation with discrete components as a part of this course.

Prerequisite(s): EENG 2710.